COMPUDYNE UTD 4800AIO EISA VESA ZIF Processor 80486DX/80486DX2 Processor Speed 25/33/40/50(internal)/50/66(internal)MHz Chip Set OPTI Video Chip Set None Maximum Onboard Unidentified Memory Maximum Video None Memory Cache 64/128/256/512/1024KB BIOS Unidentified Dimensions 330mm x 218mm I/O Options 32-bit VESA local bus slot, floppy drive interface, IDE interface, parallel port, serial ports (2) NPU Options None [Image] CONNECTIONS Purpose Location Purpose Location Serial port 1 P4 Reset switch P9 Serial port 2 P5 IDE interface LED P10 Parallel port P6 Speaker P11 IDE interface P7 Power LED & keylock P12 Floppy drive P8 32-bit VESA local bus SL1 interface slot USER CONFIGURABLE SETTINGS Function Label Position » IDE I/O channel RDY signal J1 Open select none IDE I/O channel RDY signal J1 Closed select drive » Flash BIOS programming disabled J2 Open Flash BIOS programming enabled J2 Closed » Factory configured - do not J3 Unidentified alter » Factory configured - do not J4 Unidentified alter » ISA BUS ready timing ISA RDY J26 Open ISA BUS ready timing EISA RDY J26 Closed » READY RTN generation select J28 Pins 1 & 2 closed local bus READY RTN generation select J28 Pins 2 & 3 closed system » VL BUS not delayed J29 Closed VL BUS delayed J29 Open » Monitor type select color J31 Closed Monitor type select monochrome J31 Open DRAM CONFIGURATION Note: The maximum amount of memory is unidentified. CACHE CONFIGURATION Size Bank 0 Bank 1 TAG (U61) TAG 64KB (4) 8K x 8 (4) 8K x 8 (1) 64K x 1 Unidentified 128KB (4) 32K x 8 None (1) 64K x 1 Unidentified 256KB (4) 32K x 8 (4) 32K x 8 (1) 64K x 1 Unidentified 512KB (4) 64K x 8 (4) 64K x 8 (1) 64K x 1 Unidentified 1MB (4) 128K x (4) 128K x (1) 64K x 1 Unidentified 8 8 Note: The location of banks 0 & 1 is unidentified. CACHE JUMPER CONFIGURATION Size J19 J20 J21 J22 J23 64KB Open Open Open Open Open 128KB Open Closed Open Open Open 256KB Closed Closed Open Open Open 512KB Closed Closed Closed Open Closed 1MB Closed Closed Closed Closed Closed CACHE JUMPER CONFIGURATION(CON’T) Size J24 J25 J27 J30 64KB Open Open Pins 2 & 3 Pins 2 & 3 closed closed 128KB Open Closed Pins 1 & 2 Pins 1 & 2 closed closed 256KB Closed Closed Pins 2 & 3 Pins 2 & 3 closed closed 512KB Closed Closed Pins 1 & 2 Pins 1 & 2 closed closed 1MB Closed Closed Pins 2 & 3 Pins 2 & 3 closed closed CPU SPEED SELECTION Speed J11 J12 J13 J15 J16 J17 J18 25MHz 2 & Open Open Closed Open Open Closed 3 33MHz 2 & Closed Open Closed Open Open Open 3 40MHz 2 & Open Closed Open Open Open Closed 3 50iMHz 2 & Open Open Closed Open Open Closed 3 50MHz 1 & Closed Closed Closed Open Open Closed 2 66iMHz 2 & Closed Open Closed Open Open Open 3 Note: Pins designated should be in the closed position. DMA CHANNEL SELECTION Channel J5 J6 J7 J8 J9 J10 5 Open Open Closed Closed Open Open 6 Open Closed Open Open Closed Open 7 Closed Open Open Open Open Closed VL BUS WAIT STATE SELECTION Setting J14 » 0 Open 1 Closed